# HDL Simulation Skill

Multi-simulator expertise for functional verification of FPGA designs.

## Purpose

This skill provides simulation expertise, enabling:
- Comprehensive functional verification
- Multi-simulator compatibility
- Efficient debug workflows
- Coverage-driven verification

## Key Features

- Simulation script generation
- ModelSim/Questa configuration
- Vivado Simulator (xsim) setup
- VCS and Xcelium support
- Waveform analysis guidance
- Code coverage collection
- Mixed-language simulation

## Integration

Used primarily with:
- Functional Simulation Process
- Testbench Development Process
- UVM Testbench Process
- Constrained Random Verification Process

## Related

- SK-016 in skills-agents-backlog.md
- Verification Expert Agent (AG-003)
- FPGA Debug Expert Agent (AG-009)
