
### IEEE 754 ALU

Implemented an IEEE 754 single precision floating-point ALU in Verilog supporting addition, subtraction, multi- plication, division, and comparison, with integrated handling of overflow and underflow conditions.

Source: https://github.com/ThamadaAnkita/IEEE754-Floating-Point-ALU

### 验证目标

只要验证ALU相关的功能，其他验证，例如波形、接口等，不需要出现


### 其他

所有的文档和注释都用中文编写

### bug分析

在bug分析时，请参考源码：ALU754/ 目录下的 *.v 文件
